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RISC-V is an open standard Instruction Set Architecture (ISA) enabling a new era of processor innovation through open collaboration.
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Home - RISC-V International Skip to main content Search Close Search search Menu Blog Blog Home News and Updates Viewpoints Featured Work Submit Content About Annual Report 2025 About RISC-V International Staff Board of Directors Technical Steering Committee FAQ Contact Us Specifications Ratified Specs Under Development Contribute Developers Get Started Development Partners Developer Boards Ecosystem Labs Technical Meeting Calendar Technical Resources Ambassadors & Advocates Technical Committees & Groups Industries ApplicationsApplications Automotive Data Center High Performance Computing (HPC) RISC-V for IoT & Embedded Industrial & Robotics Space and Aerospace TechnologiesTechnologies Artificial Intelligence Security SolutionsSolutions Case Studies Exchange Landscape Software Ecosystem Dashboard Community EventsEvents RISC-V Summits World RISC-V Days Calendar Community Events Videos ParticipateParticipate Become a RISC-V Insider Meeting Calendar Alliances Marketing Committees & Groups Forums Job Board LearnLearn Training Training Partners Mentorship Teach a Course Membership Current Members Join Resources Recognition x-twitter linkedin youtube github flickr slack email search NEW RISC-V AUTOMOTIVE HUB Take the Open Road. The automotive industry is embracing RISC-V as the open standard for AI-native, workload-specific silicon. Learn how one extensible ISA gives OEMs and Tier 1s precise economic control over decade-plus vehicle programs. Visit Automotive Hub EVENTS RISC-V Summit Europe 2026 Session Videos Are Now Available Catch up on the presentations you missed or revisit your favorite sessions. Watch keynotes, technical talks, and the latest innovations from across the RISC-V ecosystem. Watch Now EVENTS RISC-V Summit China 2026 Announced From October 18-20, join the global RISC-V community in Shenzhen for one of the largest RISC-V ecosystem events of the year, featuring technical sessions, networking, and the latest innovations in open computing. Learn More SPECIFICATION The Technical Backbone of RISC-V The RISC-V instruction set architecture (ISA) and related specifications are developed, ratified and maintained by contributing members within the Technical Working Groups. Download the latest releases, and get involved. View Ratified Specifications News and Insights Featured Work RISC-V International Staff | Jul 29, 2026 AgenticAI AI Hardware Conflict to Compliance: RISC-V Extension Migration Across Spec, HW, and SWProject Snapshot Non-compliant RISC-V extensions remain a practical obstacle for custom and legacy CPU designs. We present a two-phase workflow that uses the RISC-V Unified Database (UDB) as the source of truth for extension definition… Featured Work RISC-V International Staff | Jul 7, 2026 AI Edge Embedded Hardware RISC-V Edge Inference for Real-Time Eye-Movement Control on GAPses Smart GlassesProject Snapshot This live demonstration showcases GAPses, an ultra-low-power smart-glasses platform based on an ultra-low power RISC-V multicore processor (GAP9), enabling always-on, real-time, energy-efficient edge processing of electrooculography (EOG) and electroencephalography. GAPses performs on-device signal… News and Updates | Top Story James De Vile | Jun 19, 2026 Announcements RISC-V ISA Behind The Scenes of SHD Groups 2026 RISC-V Market ForecastHaving spent much of my career flying the flag for B2B tech, I know that belief in the thing you’re championing runs deeper than commercial success; we all want to see it make a genuine… Get Started With Development The RISC-V instruction set architecture (ISA) offers a highly customizable open standard platform, enabling developers to build, port, and optimize software applications, extensions, and hardware. Its simplicity and modularity enables efficient design and optimization, fostering innovation and reducing development time and cost. I am Developing... Hardware Software Specifications Support the Innovation of the RISC-V Architecture Becoming a member of RISC-V International allows companies to actively influence the development of an open, royalty-free instruction set architecture, driving innovation in custom processor designs. Membership also provides access to a global community of experts and resources, fostering collaboration and accelerating product development. EXPLORE MEMBERSHIP BENEFITS Get Certified with RISC-V RISC-V Fundamentals + Foundational Associate Exam Bundle Designed for computer engineers and programmers to gain skills in RISC-V processors, enhancing your job market competitiveness. Essential learning experience for anyone looking to enhance their career in the tech industry. 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Close Menu Blog Blog Home News and Updates Viewpoints Featured Work Submit Content About Annual Report 2025 About RISC-V International Staff Board of Directors Technical Steering Committee FAQ Contact Us Specifications Ratified Specs Under Development Contribute Developers Get Started Development Partners Developer Boards Ecosystem Labs Technical Meeting Calendar Technical Resources Ambassadors & Advocates Technical Committees & Groups Industries ApplicationsApplications Automotive Data Center High Performance Computing (HPC) RISC-V for IoT & Embedded Industrial & Robotics Space and Aerospace TechnologiesTechnologies Artificial Intelligence Security SolutionsSolutions Case Studies Exchange Landscape Software Ecosystem Dashboard Community EventsEvents RISC-V Summits World RISC-V Days Calendar Community Events Videos ParticipateParticipate Become a RISC-V Insider Meeting Calendar Alliances Marketing Committees & Groups Forums Job Board LearnLearn Training Training Partners Mentorship Teach a Course Membership Current Members Join Resources Recognition x-twitter linkedin youtube github flickr slack email